SMD Package Gets Space-Ready for Rad-Hard MOSFETs

Anchoring surface mount components (SMD package) to PCBs is a challenge. All too often, different thermal coefficients lead to an expansion misalignment of the materials used, resulting in loss of efficiency. The problem can be especially severe for electronics headed for space.

International Rectifier HiRel Products (IR HiRel), an Infineon Technologies company, addresses the problem with fourteen new QPL-qualified, radiation-hardened (rad-hard) SupIR-SMD MOSFETs housed in a direct-to-PCB PCB mounting package. SupIR-SMD is a solution for high-performance space power systems used in missions ranging from satellites to space vehicles and more.

“Space applications demand high-reliability power electronics that perform to specification in the harshest environments. They must be capable of withstanding severe thermal, mechanical and radiation conditions with expected lifetimes of 15 years or longer. SupIR-SMD is a superior package solution for thermal expansion and heat transfer,” said Andrew Popp, director of marketing at IR HiRel.

PCBs for space
Space is notoriously hostile to electronics. Electronic components used in space-borne applications are primarily subjected to space radiation, known as a single-event effect, or SEE, caused by electrons and protons trapped in Earth’s magnetic field. And yet PCBs in space must provide continuous performance and high reliability in ecommunication satellites, remote sensing satellites, navigation satellites, and other planetary satellites.

Radiation is hardly the only challenge. Space-grade PCBs are subject to shock and stress during space flight launch. Vacuum is a problem too;  it makes it difficult for PCBs to dissipate heat; if not handled properly, they may develop cracks and solder joint problems.

The most important factor for space hardware is reliability, as it is impossible except in extreme cases to repair it. PCB design can have a direct impact on the reliability of the spacecraft.

Satellite and spacecraft avionics increasingly combine high-power with RF transmissions. All these functions define unique requirements on the design, layout, and construction of a PCB, but also on the selection of a suitable dielectric material for the purpose, the number of layers in the stack-up, routing, track geometry and grounding.

Nowadays electronic systems require high levels of performance, starting with high-speed digital circuits, up to RF power amplifiers and high power LED modules, in all these fields the choice of material is definitely a serious goal for the designer to reduce possible problems related to heat dissipation and electromagnetic interference.

The choice of good material is generally a compromise between cost and performance. Some parameters to consider are signal integrity, noise immunity, and heat dissipation. The dielectric constant is a starting point for many selection processes for PCB materials, as well as the coefficient of thermal expansion (CTE) and the dissipation factor.

Good signal integrity also makes it possible to evaluate a number of factors such as electromagnetic compatibility requirements, and EMI, electromagnetic interference requirements.  The choice of materials ensures a perfect solution to limit crosstalk noise and, at the same time, the losses that can compromise the functioning of the system.

The CTE shows the speed at which a PCB material expands after heating. CTE is a way to express the amount of volume change of a material during a temperature change, expressed in parts per million per degree centigrade. Most substrates have a higher CTE than copper. It can cause interconnection problems when the PCB temperature increases.

New package
The misalignment of the coefficient of thermal expansion (CTE) between the PCB and the hermetically sealed surface mount poses two fundamental challenges: maintaining reliable solder joints at the interface and preserving the sealed integrity of the hermetically sealed power MOSFET. Even small CTE mismatches can cause thermal stress-induced interface fractures.

The property of materials to expand with temperature is well known. It occurs in all 3 dimensions. This expansion gives rise to the same tension that can cause assembly problems. The change in length of a material due to a change in temperature is defined by the equation:

where l is the material length, α is the coefficient of linear expansion in units of 10-6 /K (or ppm/K) and ΔT is the change in temperature in degrees Kelvin. So, for an α of 100 ppm/K there would be a 0.01% change in the length of a material. Even small deviations cause stress and deformation (Table 1).

Table 1: Material Properties Used in Analyses (source: Infineon)

IR HiRel devices are housed in airtight packages made mostly from a combination of metal and ceramic. Ceramic has a CTE of about 6 ppm/K, and most PCBs have CTE in the above range of 13-14 ppm/K (FR-4 board) or 17-18 ppm/K (polyimide board). This large misalignment poses significant design challenges such as solder fatigue and package stress. The metal is ductile and the ceramic is brittle. If subjected to high levels of stress, the metal can experience great strain without breaking, while the ceramic will crack. This “make-or-break” property of the ceramic adds another challenge to the design of airtight packages. For years, ceramic cracking has been a problem when surface mount power devices are mounted directly onto PCBs.

Designers are currently using various configurations with the power packages being upside down and connected to the PCB using cables. This configuration not only dissipates heat suboptimally but reduces the MOSFET capacity.

In contrast, the SupIR-SMD is able to connect directly to the PCB, offering a more direct heat transfer heat path. “Compared to the typical packaging solution used in space applications, SupIR-SMD offers a 37% smaller footprint, 34% lighter mass, and 33% higher current capability,” said Andrew.

He continued, “Some benefits can be the following: gradual CTE change from ceramic to PCB, reducing stress from a large CTE mismatch; more direct thermal path through the bottom of the part where the die is mounted.”

In order to solve the cracking problem caused by the large CTE misalignment between the power package and the printed circuit board, and also minimize thermal and electrical resistance, IR HiRel has adopted a multi-level design as shown in Figure 2. “The former method of adding ribbon leads or carriers to the larger SMD’s was an inelegant and sub-optimal solution which is now solved by the SupIR-SMD,” said Andrew.

Figure 1: Lead Attachment Option for SMD to Solve Assembly Thermal Expansion Concerns (Source: IR HiRel)

Figure 2: The SupIR-SMD, A New Design Concept (Cutaway View Showing Chip and Wirebond Inside) (Source: IR HiRel)

In this design, the base has two layers, the layer connecting the ceramic body has a CTE that matches the ceramic CTE, and the layer connecting the printed circuit board has a CTE value between the first layer and the printed circuit board. In this way, the CTE gradually changes from ceramic to PCB and thus reduces the stress from a large CTE misalignment.

Figure 3: SupIR-SMD package

The SupIR-SMD package is JANS-qualified to MIL-PRF-19500. JANS is the most stringent level of screening and acceptance requirements available to ensure the performance, quality, and reliability of discrete semiconductors for space flight.

The new rad hard MOSFETs are also QPL-qualified, according to the Qualified Products List (QPL) for space applications. Common applications for the rad hard MOSFETs include space satellite bus power distribution systems, space-grade DC-DC converters and other high speed switching designs.

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